Posts
All the articles I've posted.
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genie-claw: building a private on-device AI agent for Jetson — what is limited context size, and why it's the real engineering problem
On-device private home agent on Jetson Orin Nano 8 GB — what context size actually means, the KV cache memory math, 4096-token budget engineering, and BFCL accuracy from grounding.
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AI agents vs. AI Inference: how they evolved and competed in 2026 — the Claw War, the fastest token, and what the race really is
2026: the OpenClaw wave, the Claw War between agent frameworks, and the inference arms race underneath — TTFT, throughput, and why fast tokens became the real competitive moat.
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Nvidia Jetson as an intelligent Thread border router: ESP32-C6 driver port and the connected-home vision
Porting the ESP-Hosted-NG kernel driver to Jetson Orin Nano 8 GB: WiFi + BLE 5.0 over SPI from an ESP32-C6, and why 67 TOPS + IEEE 802.15.4 = an intelligent Thread border router.
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Seven hard-won lessons from putting a zk-STARK prover on the Blackwell RTX PRO 6000 — 245 hand-written CUDA kernels
245 hand-written CUDA kernels on the RTX PRO 6000 Blackwell: seven performance-engineering lessons from GPU-accelerating a zk-STARK prover — profiling, memory, PTX, registers, and what Blackwell changed.
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Why I dropped UltraScale+ FPGAs for a single L40S — TIP5 mining on a GPU in one month, not six
After six months on FPGAs, a single NVIDIA L40S hit the TIP5 mining target in one month — and why the Goldilocks field maps so naturally onto CUDA.
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A UART-driven FPGA miner in pure PL — TIP5 on three VU35P UltraScale+, no soft processor, programmed through a Zynq 7010
A pure-PL TIP5 miner on three VU35P UltraScale+ FPGAs (Osprey E300): soft UART, AXI master, and control FSM with no processor, programmed via a Zynq 7010.